Current-mode logic (CML) circuitry, such as shown in Colace, Electronic Product Design, January 1986, pages 43-46; Millman et al, "Pulse Digital, and Switching Waveforms", McGraw, Hill Book Company, New York, 1965, pages 358-359; and Hamilton et al "Basic Integrated Circuit Engineering", McGraw-Hill Book Company, New York, 1975, pages 492-497, offers high speed, but the required stacking of logic levels limits performance when low voltage supply operation is necessary. For operation below 2 volts, for example, only two logic levels can be used. A four-input gate is only achieved using a cascade of two-input gates. This leads to several gate delays and extra level shifts.
Such two-input gates must be combined with level shifting buffers to realize a four-input gate. Single ended logic can be much simpler, but the lack of differential signal paths makes the logic more prone to noise, especially from the voltage supply. This problem is aggravated in the case of high-speed logic in which small signal swings are required.
Two common forms of CML that are used include a multi-level CML shown in FIG. 1 and a single-ended version shown in FIG. 2. The multi-level CML of FIG. 1 is differential, but requires different logic levels for inputs A,A and B, B. Emitter followers can be used to translate from the top level to the bottom level as shown in FIG. 1.
The current-mode logic (CML), illustrated in FIG. 1, offers high speed, but the required stacking of logic levels limits performance. This performance limitation is especially noticeable when a low voltage supply operation is necessary. For operation below two volts, for example, only two logic levels can be used. A four-input gate must be realized with a cascade of two-input gate leading to several gate delays and extra level shifts. The prior art logic of CML shown in FIG. 1 indicates how two-input gates are combined with level-shifting buffers to form a four input gate.
The single-ended logic version shown in FIG. 2 operates with a reference voltage, V.sub.REF. This circuitry shows single-ended logic which is much simpler, but the lack of differential signal paths makes the logic more susceptible to noise, especially from the voltage supply. This problem is aggravated in the case of high-speed logic in which small signal-swings are required.